Folkert Kevelam
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c044e5243b
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Standardize register access
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2025-06-27 21:24:40 +02:00 |
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Folkert Kevelam
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5e42b68f47
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Add basic bit types
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2025-06-27 20:46:07 +02:00 |
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Folkert Kevelam
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c4ebe23f73
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Change compilation switches
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2025-06-27 20:34:53 +02:00 |
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Folkert Kevelam
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2ce6e5ef82
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Remove erroneous memory layout
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2025-06-26 13:23:05 +02:00 |
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Folkert Kevelam
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120781866f
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Initial idea for PIO Block registers
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2025-06-25 23:18:34 +02:00 |
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Folkert Kevelam
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b899c9f4ce
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Add Packed bytes for working with
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2025-06-25 23:17:52 +02:00 |
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Folkert Kevelam
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181e2815f4
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Initial commit:
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2025-06-24 22:42:28 +02:00 |
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Folkert Kevelam
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7edee9f7cc
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Adding required switches for cortex-m0+
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2025-06-24 22:41:59 +02:00 |
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Folkert Kevelam
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abede4a41c
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Initial commit
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2025-06-24 22:38:09 +02:00 |
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Folkert Kevelam
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b5d7749cf2
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Initial commit
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2025-06-24 22:37:52 +02:00 |
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Folkert Kevelam
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efb48f02cf
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Change to Aspect definitions
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2025-06-24 22:37:30 +02:00 |
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Folkert Kevelam
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2a3a411197
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Add gprbuild for runtime
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2025-06-24 22:36:31 +02:00 |
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Folkert Kevelam
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4e9879c6a1
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Initial commit
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2025-06-23 20:34:39 +02:00 |
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Folkert Kevelam
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dd8a75390b
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Initial commit
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2025-06-23 20:34:28 +02:00 |
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Folkert Kevelam
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01553b1306
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Initial commit
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2025-06-23 20:33:55 +02:00 |
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Folkert Kevelam
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1f430a02b2
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Initial commit
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2025-06-23 20:33:46 +02:00 |
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