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22 Commits

Author SHA1 Message Date
Folkert Kevelam
7ac990a06c Add additional registers 2025-07-04 21:38:21 +02:00
Folkert Kevelam
cb771ba762 Adds Additional registers and supporting types 2025-07-02 21:02:02 +02:00
Folkert Kevelam
36825506d6 Initial commit 2025-06-28 21:58:51 +02:00
Folkert Kevelam
c73b6c56c7 Initial commit 2025-06-28 21:57:18 +02:00
Folkert Kevelam
c7a7879813 Remove hardcoded values 2025-06-28 21:56:48 +02:00
Folkert Kevelam
940106f96d Initial commit 2025-06-28 21:51:49 +02:00
Folkert Kevelam
35003ed187 Add addresses for PIO_0 and PIO_1 2025-06-27 21:54:10 +02:00
Folkert Kevelam
a2ed5a7526 Initial commit 2025-06-27 21:53:53 +02:00
Folkert Kevelam
c044e5243b Standardize register access 2025-06-27 21:24:40 +02:00
Folkert Kevelam
5e42b68f47 Add basic bit types 2025-06-27 20:46:07 +02:00
Folkert Kevelam
c4ebe23f73 Change compilation switches 2025-06-27 20:34:53 +02:00
Folkert Kevelam
2ce6e5ef82 Remove erroneous memory layout 2025-06-26 13:23:05 +02:00
Folkert Kevelam
120781866f Initial idea for PIO Block registers 2025-06-25 23:18:34 +02:00
Folkert Kevelam
b899c9f4ce Add Packed bytes for working with 2025-06-25 23:17:52 +02:00
Folkert Kevelam
181e2815f4 Initial commit: 2025-06-24 22:42:28 +02:00
Folkert Kevelam
7edee9f7cc Adding required switches for cortex-m0+ 2025-06-24 22:41:59 +02:00
Folkert Kevelam
abede4a41c Initial commit 2025-06-24 22:38:09 +02:00
Folkert Kevelam
b5d7749cf2 Initial commit 2025-06-24 22:37:52 +02:00
Folkert Kevelam
efb48f02cf Change to Aspect definitions 2025-06-24 22:37:30 +02:00
Folkert Kevelam
2a3a411197 Add gprbuild for runtime 2025-06-24 22:36:31 +02:00
Folkert Kevelam
4e9879c6a1 Initial commit 2025-06-23 20:34:39 +02:00
Folkert Kevelam
dd8a75390b Initial commit 2025-06-23 20:34:28 +02:00
10 changed files with 709 additions and 0 deletions

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.gitignore vendored Normal file
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.build
adalib

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package Interfaces.RP2040.PIO is
type CTRL_Type is
record
SM_Enable0 : Bit_1;
SM_Enable1 : Bit_1;
SM_Enable2 : Bit_1;
SM_Enable3 : Bit_1;
SM_Restart0 : Bit_1;
SM_Restart1 : Bit_1;
SM_Restart2 : Bit_1;
SM_Restart3 : Bit_1;
CLKDIV_Restart0 : Bit_1;
CLKDIV_Restart1 : Bit_1;
CLKDIV_Restart2 : Bit_1;
CLKDIV_Restart3 : Bit_1;
Reserved : Bit_20;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for CTRL_Type use
record
SM_Enable0 at 0 range 0 .. 0;
SM_Enable1 at 0 range 1 .. 1;
SM_Enable2 at 0 range 2 .. 2;
SM_Enable3 at 0 range 3 .. 3;
SM_Restart0 at 0 range 4 .. 4;
SM_Restart1 at 0 range 5 .. 5;
SM_Restart2 at 0 range 6 .. 6;
SM_Restart3 at 0 range 7 .. 7;
CLKDIV_Restart0 at 0 range 8 .. 8;
CLKDIV_Restart1 at 0 range 9 .. 9;
CLKDIV_Restart2 at 0 range 10 .. 10;
CLKDIV_Restart3 at 0 range 11 .. 11;
Reserved at 0 range 12 .. 31;
end record;
type FSTAT_Type is
record
RXFULL0 : Bit_1;
RXFULL1 : Bit_1;
RXFULL2 : Bit_1;
RXFULL3 : Bit_1;
Reserved_4_7 : Bit_4;
RXEMPTY0 : Bit_1;
RXEMPTY1 : Bit_1;
RXEMPTY2 : Bit_1;
RXEMPTY3 : Bit_1;
Reserved_12_15 : Bit_4;
TXFULL0 : Bit_1;
TXFULL1 : Bit_1;
TXFULL2 : Bit_1;
TXFULL3 : Bit_1;
Reserved_20_23 : Bit_4;
TXEMPTY0 : Bit_1;
TXEMPTY1 : Bit_1;
TXEMPTY2 : Bit_1;
TXEMPTY3 : Bit_1;
Reserved_28_31 : Bit_4;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for FSTAT_Type use
record
RXFULL0 at 0 range 0 .. 0;
RXFULL1 at 0 range 1 .. 1;
RXFULL2 at 0 range 2 .. 2;
RXFULL3 at 0 range 3 .. 3;
Reserved_4_7 at 0 range 4 .. 7;
RXEMPTY0 at 0 range 8 .. 8;
RXEMPTY1 at 0 range 9 .. 9;
RXEMPTY2 at 0 range 10 .. 10;
RXEMPTY3 at 0 range 11 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
TXFULL0 at 0 range 16 .. 16;
TXFULL1 at 0 range 17 .. 17;
TXFULL2 at 0 range 18 .. 18;
TXFULL3 at 0 range 19 .. 19;
Reserved_20_23 at 0 range 20 .. 23;
TXEMPTY0 at 0 range 24 .. 24;
TXEMPTY1 at 0 range 25 .. 25;
TXEMPTY2 at 0 range 26 .. 26;
TXEMPTY3 at 0 range 27 .. 27;
Reserved_28_31 at 0 range 28 .. 31;
end record;
type FDEBUG_Type is
record
RXSTALL0 : Bit_1;
RXSTALL1 : Bit_1;
RXSTALL2 : Bit_1;
RXSTALL3 : Bit_1;
Reserved_4_7 : Bit_4;
RXUNDER0 : Bit_1;
RXUNDER1 : Bit_1;
RXUNDER2 : Bit_1;
RXUNDER3 : Bit_1;
Reserved_12_15 : Bit_4;
TXOVER0 : Bit_1;
TXOVER1 : Bit_1;
TXOVER2 : Bit_1;
TXOVER3 : Bit_1;
Reserved_20_23 : Bit_4;
TXTSTALL0 : Bit_1;
TXTSTALL1 : Bit_1;
TXTSTALL2 : Bit_1;
TXTSTALL3 : Bit_1;
Reserved_28_31 : Bit_4;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for FDEBUG_Type use
record
RXSTALL0 at 0 range 0 .. 0;
RXSTALL1 at 0 range 1 .. 1;
RXSTALL2 at 0 range 2 .. 2;
RXSTALL3 at 0 range 3 .. 3;
Reserved_4_7 at 0 range 4 .. 7;
RXUNDER0 at 0 range 8 .. 8;
RXUNDER1 at 0 range 9 .. 9;
RXUNDER2 at 0 range 10 .. 10;
RXUNDER3 at 0 range 11 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
TXOVER0 at 0 range 16 .. 16;
TXOVER1 at 0 range 17 .. 17;
TXOVER2 at 0 range 18 .. 18;
TXOVER3 at 0 range 19 .. 19;
Reserved_20_23 at 0 range 20 .. 23;
TXTSTALL0 at 0 range 24 .. 24;
TXTSTALL1 at 0 range 25 .. 25;
TXTSTALL2 at 0 range 26 .. 26;
TXTSTALL3 at 0 range 27 .. 27;
Reserved_28_31 at 0 range 28 .. 31;
end record;
type FLEVEL_Type is
record
TX0 : Bit_4;
RX0 : Bit_4;
TX1 : Bit_4;
RX1 : Bit_4;
TX2 : Bit_4;
RX2 : Bit_4;
TX3 : Bit_4;
RX3 : Bit_4;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for FLEVEL_Type use
record
TX0 at 0 range 0 .. 3;
RX0 at 0 range 4 .. 7;
TX1 at 0 range 8 .. 11;
RX1 at 0 range 12 .. 15;
TX2 at 0 range 16 .. 19;
RX2 at 0 range 20 .. 23;
TX3 at 0 range 24 .. 27;
RX3 at 0 range 28 .. 31;
end record;
type IRQ_Type is
record
IRQ0 : Bit_1;
IRQ1 : Bit_1;
IRQ2 : Bit_1;
IRQ3 : Bit_1;
IRQ4 : Bit_1;
IRQ5 : Bit_1;
IRQ6 : Bit_1;
IRQ7 : Bit_1;
Reserved : Bit_24;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for IRQ_Type use
record
IRQ0 at 0 range 0 .. 0;
IRQ1 at 0 range 1 .. 1;
IRQ2 at 0 range 2 .. 2;
IRQ3 at 0 range 3 .. 3;
IRQ4 at 0 range 4 .. 4;
IRQ5 at 0 range 5 .. 5;
IRQ6 at 0 range 6 .. 6;
IRQ7 at 0 range 7 .. 7;
Reserved at 0 range 8 .. 31;
end record;
type DBG_CFGINFO_Type is
record
FIFO_Depth : Bit_6;
Reserved_6_7 : Bit_2;
SM_Count : Bit_4;
Reserved_12_15 : Bit_4;
IMEM_Size : Bit_6;
Reserved_22_31 : Bit_10;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for DBG_CFGINFO_Type use
record
FIFO_Depth at 0 range 0 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
SM_Count at 0 range 8 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
IMEM_Size at 0 range 16 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
type INSTR_MEM_Type is
record
Mem : Bit_16;
Reserved : Bit_16;
end record
with Volatile, Full_Access_Only;
for INSTR_MEM_Type use
record
Mem at 0 range 0 .. 15;
Reserved at 0 range 16 .. 31;
end record;
type Array_INSTR_MEM is array (Natural range <>) of INSTR_MEM_Type
with Component_Size => 32;
type SM_CLKDIV_Type is
record
Reserved : Bit_8;
Frac : Bit_8;
Int : Bit_16;
end record
with Volatile, Full_Access_Only;
for SM_CLKDIV_Type use
record
Reserved at 0 range 0 .. 7;
Frac at 0 range 8 .. 15;
Int at 0 range 16 .. 31;
end record;
type Array_SM_CLKDIV is array (Natural range <>) of SM_CLKDIV_Type
with Component_Size => 32;
type SM_EXECCTRL_Type is
record
STATUS_N : Bit_4;
STATUS_SEL : Bit_1;
Reserved_5_6 : Bit_2;
Wrap_Bottom : Bit_5;
Wrap_Top : Bit_5;
Out_Sticky : Bit_1;
Inline_Out_En : Bit_1;
Out_EN_SEL : Bit_5;
JMP_Pin : Bit_5;
Side_Pindir : Bit_1;
Side_EN : Bit_1;
EXEC_Stalled : Bit_1;
end record
with Volatile, Full_Access_Only;
for SM_EXECCTRL_Type use
record
STATUS_N at 0 range 0 .. 3;
STATUS_SEL at 0 range 4 .. 4;
Reserved_5_6 at 0 range 5 .. 6;
Wrap_Bottom at 0 range 7 .. 11;
Wrap_Top at 0 range 12 .. 16;
Out_Sticky at 0 range 17 .. 17;
Inline_Out_En at 0 range 18 .. 18;
Out_EN_SEL at 0 range 19 .. 23;
JMP_Pin at 0 range 24 .. 28;
Side_Pindir at 0 range 29 .. 29;
Side_EN at 0 range 30 .. 30;
EXEC_Stalled at 0 range 31 .. 31;
end record;
type Array_SM_EXECCTRL is array (Natural range <>) of SM_EXECCTRL_Type
with Component_Size => 32;
type PIO_Type is
record
CTRL : CTRL_Type;
FSTAT : FSTAT_Type;
FDEBUG : FDEBUG_Type;
FLEVEL : FLEVEL_Type;
TXF : Array_Bit_32 (0 .. 3);
RXF : Array_Bit_32 (0 .. 3);
IRQ : IRQ_Type;
IRQ_Force : IRQ_Type;
Input_Sync_Bypass : Array_Bit_1 (0 .. 31)
with Volatile, Full_Access_Only;
DBG_PADOUT : Array_Bit_1 (0 .. 31)
with Volatile, Full_Access_Only;
DBG_PADOE : Array_Bit_1 (0 .. 31)
with Volatile, Full_Access_Only;
DBG_CFGINFO : DBG_CFGINFO_Type;
INSTR_MEM : Array_INSTR_MEM (0 .. 31);
SM_CLKDIV : Array_SM_CLKDIV (0 .. 3);
SM_EXECCTRL : Array_SM_EXECCTRL (0 .. 3);
end record;
PIO_0 : PIO_Type
with Volatile, Address => PIO_0_Base;
PIO_1 : PIO_Type
with Volatile, Address => PIO_1_Base;
end Interfaces.RP2040.PIO;

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with System;
package Interfaces.RP2040
with Pure is
ROM_Base : constant System.Address :=
System'To_Address (16#00000000#);
XIP_Base : constant System.Address :=
System'To_Address (16#10000000#);
XIP_No_Alloc_Base : constant System.Address :=
System'To_Address (16#11000000#);
XIP_No_Cache_Base : constant System.Address :=
System'To_Address (16#12000000#);
XIP_No_Alloc_No_Cache_Base : constant System.Address :=
System'To_Address (16#13000000#);
XIP_CTRL_Base : constant System.Address :=
System'To_Address (16#14000000#);
XIP_SRAM_Base : constant System.Address :=
System'To_Address (16#15000000#);
XIP_SRAM_End : constant System.Address :=
System'To_Address (16#15004000#);
XIP_SSI_Base : constant System.Address :=
System'To_Address (16#18000000#);
SRAM_Base : constant System.Address :=
System'To_Address (16#20000000#);
SRAM_Striped_Base : constant System.Address :=
System'To_Address (16#20000000#);
SRAM_Striped_End : constant System.Address :=
System'To_Address (16#20040000#);
SRAM_0_Base : constant System.Address :=
System'To_Address (16#21000000#);
SRAM_1_Base : constant System.Address :=
System'To_Address (16#21010000#);
SRAM_2_Base : constant System.Address :=
System'To_Address (16#21020000#);
SRAM_3_Base : constant System.Address :=
System'To_Address (16#21030000#);
SRAM_4_Base : constant System.Address :=
System'To_Address (16#20040000#);
SRAM_5_Base : constant System.Address :=
System'To_Address (16#20041000#);
SRAM_End : constant System.Address :=
System'To_Address (16#20042000#);
SYSINFO_Base : constant System.Address :=
System'To_Address (16#40000000#);
SYSCFG_Base : constant System.Address :=
System'To_Address (16#40004000#);
Clocks_Base : constant System.Address :=
System'To_Address (16#40008000#);
Resets_Base : constant System.Address :=
System'To_Address (16#4000C000#);
PSM_Base : constant System.Address :=
System'To_Address (16#40010000#);
IO_Bank_0_Base : constant System.Address :=
System'To_Address (16#40014000#);
IO_QSPI_Base : constant System.Address :=
System'To_Address (16#40018000#);
Pads_Bank_0_Base : constant System.Address :=
System'To_Address (16#4001c000#);
Pads_QSPI_Base : constant System.Address :=
System'To_Address (16#40020000#);
XOSC_Base : constant System.Address :=
System'To_Address (16#40024000#);
PLL_SYS_Base : constant System.Address :=
System'To_Address (16#40028000#);
PLL_USB_Base : constant System.Address :=
System'To_Address (16#4002C000#);
BUSCTRL_Base : constant System.Address :=
System'To_Address (16#40030000#);
UART_0_Base : constant System.Address :=
System'To_Address (16#40034000#);
UART_1_Base : constant System.Address :=
System'To_Address (16#40038000#);
SPI_0_Base : constant System.Address :=
System'To_Address (16#4003C000#);
SPI_1_Base : constant System.Address :=
System'To_Address (16#40040000#);
I2C_0_Base : constant System.Address :=
System'To_Address (16#40044000#);
I2C_1_Base : constant System.Address :=
System'To_Address (16#40048000#);
ADC_Base : constant System.Address :=
System'To_Address (16#4004C000#);
PWM_Base : constant System.Address :=
System'To_Address (16#40050000#);
Timer_Base : constant System.Address :=
System'To_Address (16#40054000#);
Watchdog_Base : constant System.Address :=
System'To_Address (16#40058000#);
RTC_Base : constant System.Address :=
System'To_Address (16#4005C000#);
ROSC_Base : constant System.Address :=
System'To_Address (16#40060000#);
VREG_And_Chip_Reset_Base : constant System.Address :=
System'To_Address (16#40064000#);
TBMAN_Base : constant System.Address :=
System'To_Address (16#40068000#);
DMA_Base : constant System.Address :=
System'To_Address (16#50000000#);
USBCTRL_Base : constant System.Address :=
System'To_Address (16#50100000#);
USBCTRL_DPRAM_Base : constant System.Address :=
System'To_Address (16#50100000#);
USBCTRL_REGS_Base : constant System.Address :=
System'To_Address (16#50110000#);
PIO_0_Base : constant System.Address :=
System'To_Address (16#50200000#);
PIO_1_Base : constant System.Address :=
System'To_Address (16#50300000#);
XIP_AUX_Base : constant System.Address :=
System'To_Address (16#50400000#);
SIO_Base : constant System.Address :=
System'To_Address (16#D0000000#);
PPB_Base : constant System.Address :=
System'To_Address (16#E0000000#);
end Interfaces.RP2040;

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package Interfaces
with Pure is
type Bit_1 is mod 2**1
with Size => 1;
type Bit_2 is mod 2**2
with Size => 2;
type Bit_3 is mod 2**3
with Size => 3;
type Bit_4 is mod 2**4
with Size => 4;
type Bit_5 is mod 2**5
with Size => 5;
type Bit_6 is mod 2**6
with Size => 6;
type Bit_7 is mod 2**7
with Size => 7;
type Bit_8 is mod 2**8
with Size => 8;
type Bit_10 is mod 2**10
with Size => 10;
type Bit_16 is mod 2**16
with Size => 16;
type Bit_20 is mod 2**20
with Size => 20;
type Bit_24 is mod 2**24
with Size => 24;
type Bit_31 is mod 2**31
with Size => 31;
type Bit_32 is mod 2**32
with Size => 32;
type Array_Bit_1 is array (Natural range <>) of Bit_1
with Component_Size => 1;
type Array_Bit_32 is array (Natural range <>) of Bit_32
with Component_Size => 32;
function Shift_Left (Value : Bit_32; Amount : Natural)
return Bit_32 with Import, Convention => Intrinsic;
function Shift_Right (Value : Bit_32; Amount : Natural)
return Bit_32 with Import, Convention => Intrinsic;
function Shift_Right_Arithmetic (Value : Bit_32; Amount : Natural)
return Bit_32 with Import, Convention => Intrinsic;
function Rotate_Left (Value : Bit_32; Amount : Natural)
return Bit_32 with Import, Convention => Intrinsic;
function Rotate_Right (Value : Bit_32; Amount : Natural)
return Bit_32 with Import, Convention => Intrinsic;
end Interfaces;

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package System.Storage_Elements
with Pure is
type Storage_Offset is range
-2 ** (Word_Size - 1) ..
2 ** (Word_Size - 1) - 1;
subtype Storage_Count is Storage_Offset range 0 .. Storage_Offset'Last;
type Storage_Element is mod 2 ** Storage_Unit;
for Storage_Element'Size use Storage_Unit;
type Storage_Array is array
(Storage_Offset range <>) of aliased Storage_Element;
for Storage_Array'Component_Size use Storage_Unit;
function "+" (Left : Address; Right : Storage_Offset) return Address
with Import, Convention => Intrinsic;
function "+" (Left : Storage_Offset; Right : Address) return Address
with Import, Convention => Intrinsic;
function "-" (Left : Address; Right : Storage_Offset) return Address
with Import, Convention => Intrinsic;
function "-" (Left : Storage_Offset; Right : Address) return Address
with Import, Convention => Intrinsic;
type Integer_Address is mod Memory_Size;
function To_Address (Value : Integer_Address) return Address
with Import, Convention => Intrinsic;
function To_Integer (Value : Address) return Integer_Address
with Import, Convention => Intrinsic;
end System.Storage_Elements;

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package System.Unsigned_Types with
Pure is
type Packed_Byte is mod 2 ** 8
with Universal_Aliasing;
for Packed_Byte'Size use 8;
type Packed_Bytes1 is array (Natural range <>) of aliased Packed_Byte
with Suppress_Initialization;
for Packed_Bytes1'Alignment use 1;
for Packed_Bytes1'Component_Size use Packed_Byte'Size;
end System.Unsigned_Types;

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package System
with Pure is
type Name is (Light_Runtime_RP2040);
System_Name : constant Name := Light_Runtime_RP2040;
Min_Int : constant := Long_Long_Integer'First;
Max_Int : constant := Long_Long_Integer'Last;
Storage_Unit : constant := 8;
Word_Size : constant := 4 * Storage_Unit;
Memory_Size : constant := 2 ** Word_Size;
Max_Binary_Modulus : constant := 2 ** Word_Size;
Max_NonBinary_Modulus : constant := 2 ** Word_Size - 1;
type Address is private
with Preelaborable_Initialization;
Null_Address : constant Address;
function "<" (Left, Right : Address) return Boolean
with Import, Convention => Intrinsic;
function "<=" (Left, Right : Address) return Boolean
with Import, Convention => Intrinsic;
function ">" (Left, Right : Address) return Boolean
with Import, Convention => Intrinsic;
function ">=" (Left, Right : Address) return Boolean
with Import, Convention => Intrinsic;
function "=" (Left, Right : Address) return Boolean
with Import, Convention => Intrinsic;
type Bit_Order is (High_Order_First, Low_Order_First);
Default_Bit_Order : constant Bit_Order := Low_Order_First;
private
type Address is mod Memory_Size;
Null_Address : constant Address := 0;
end System;

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generic
type Source (<>) is limited private;
type Target (<>) is limited private;
function Unchecked_Conversion (S : Source) return Target
with Pure, Import, Convention => Intrinsic;

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runtime/runtime.gpr Normal file
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library project Runtime is
for Languages use ("Ada");
for Library_Auto_Init use "False";
for Library_Name use "gnat";
for Library_Kind use "static";
for Library_Dir use "adalib";
for Object_Dir use ".build";
for Source_Dirs use ("adainclude");
for Target use "arm-eabi";
for Runtime ("Ada") use Runtime'Project_Dir;
package Compiler is
COMMON_FLAGS := ("-ffunction-sections", "-fdata-sections");
COMMON_FLAGS := COMMON_FLAGS & ("-g", "-Os");
ALL_ADAFLAGS :=
("-gnatwae", "-gnatpgn", "-gnatqQ", "-nostdinc", "-gnat2022")
& COMMON_FLAGS
& external_as_list ("EXTRA_ADAFLAGS", " ");
ALL_ADAFLAGS := ALL_ADAFLAGS & "-gnata";
ALL_CFLAGS :=
external_as_list("INCLUDES", " ")
& external_as_list("DEFINES", " ")
& ("-DIN_RTS", "-Dinhibit_libc") & COMMON_FLAGS;
for Switches ("C") use ALL_CFLAGS;
for Switches ("Ada") use ALL_ADAFLAGS;
end Compiler;
package Install is
for Prefix use "arm-eabi/lib/gnat/";
for Sources_Subdir use "adainclude";
for Ali_Subdir use "adalib";
for Lib_Subdir use "adalib";
for Required_Artifacts (".") use ("runtime.xml");
for Install_Project use "false";
end Install;
end Runtime;

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runtime/runtime.xml Normal file
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<?xml version="1.0" ?>
<gprconfig>
<configuration>
<config><![CDATA[
package Compiler is
Common_Required_Switches :=
("-mlittle-endian",
"-mcpu=cortex-m0plus", "-mthumb");
for Leading_Required_Switches ("Ada") use
Compiler'Leading_Required_Switches ("Ada") &
Common_Required_Switches;
for Leading_Required_Switches ("C") use
Compiler'Leading_Required_Switches ("C") &
Common_Required_Switches;
end Compiler;
package Linker is
for Required_Switches use Linker'Required_Switches &
("${RUNTIME_DIR(ada)}/adalib/libgnat.a") &
Compiler.Common_Required_Switches &
("-nostdlib", "-lm", "-lgcc", "-lc");
end Linker;
package Binder is
for Required_Switches ("Ada") use Binder'Required_Switches ("Ada")
& ("-nostdlib");
end Binder;
]]>
</config>
</configuration>
</gprconfig>