Adds Additional registers and supporting types
This commit is contained in:
parent
36825506d6
commit
cb771ba762
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@ -1,12 +1,19 @@
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with System.Storage_Elements; use System.Storage_Elements;
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package Interfaces.RP2040.PIO is
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package Interfaces.RP2040.PIO is
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type CTRL_Type is
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type CTRL_Type is
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record
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record
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SM_Enable : Bit_4;
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SM_Enable0 : Bit_1;
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SM_Restart : Bit_4;
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SM_Enable1 : Bit_1;
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CLKDIV_Restart : Bit_4;
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SM_Enable2 : Bit_1;
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SM_Enable3 : Bit_1;
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SM_Restart0 : Bit_1;
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SM_Restart1 : Bit_1;
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SM_Restart2 : Bit_1;
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SM_Restart3 : Bit_1;
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CLKDIV_Restart0 : Bit_1;
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CLKDIV_Restart1 : Bit_1;
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CLKDIV_Restart2 : Bit_1;
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CLKDIV_Restart3 : Bit_1;
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Reserved : Bit_20;
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Reserved : Bit_20;
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end record
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end record
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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@ -14,21 +21,42 @@ package Interfaces.RP2040.PIO is
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for CTRL_Type use
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for CTRL_Type use
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record
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record
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SM_Enable at 0 range 0 .. 3;
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SM_Enable0 at 0 range 0 .. 0;
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SM_Restart at 0 range 4 .. 7;
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SM_Enable1 at 0 range 1 .. 1;
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CLKDIV_Restart at 0 range 8 .. 11;
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SM_Enable2 at 0 range 2 .. 2;
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SM_Enable3 at 0 range 3 .. 3;
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SM_Restart0 at 0 range 4 .. 4;
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SM_Restart1 at 0 range 5 .. 5;
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SM_Restart2 at 0 range 6 .. 6;
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SM_Restart3 at 0 range 7 .. 7;
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CLKDIV_Restart0 at 0 range 8 .. 8;
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CLKDIV_Restart1 at 0 range 9 .. 9;
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CLKDIV_Restart2 at 0 range 10 .. 10;
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CLKDIV_Restart3 at 0 range 11 .. 11;
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Reserved at 0 range 12 .. 31;
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Reserved at 0 range 12 .. 31;
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end record;
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end record;
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type FSTAT_Type is
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type FSTAT_Type is
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record
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record
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RXFULL : Bit_4;
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RXFULL0 : Bit_1;
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RXFULL1 : Bit_1;
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RXFULL2 : Bit_1;
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RXFULL3 : Bit_1;
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Reserved_4_7 : Bit_4;
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Reserved_4_7 : Bit_4;
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RXEMPTY : Bit_4;
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RXEMPTY0 : Bit_1;
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RXEMPTY1 : Bit_1;
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RXEMPTY2 : Bit_1;
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RXEMPTY3 : Bit_1;
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Reserved_12_15 : Bit_4;
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Reserved_12_15 : Bit_4;
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TXFULL : Bit_4;
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TXFULL0 : Bit_1;
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TXFULL1 : Bit_1;
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TXFULL2 : Bit_1;
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TXFULL3 : Bit_1;
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Reserved_20_23 : Bit_4;
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Reserved_20_23 : Bit_4;
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TXEMPTY : Bit_4;
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TXEMPTY0 : Bit_1;
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TXEMPTY1 : Bit_1;
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TXEMPTY2 : Bit_1;
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TXEMPTY3 : Bit_1;
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Reserved_28_31 : Bit_4;
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Reserved_28_31 : Bit_4;
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end record
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end record
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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@ -36,62 +64,188 @@ package Interfaces.RP2040.PIO is
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for FSTAT_Type use
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for FSTAT_Type use
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record
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record
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RXFULL at 0 range 0 .. 3;
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RXFULL0 at 0 range 0 .. 0;
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RXFULL1 at 0 range 1 .. 1;
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RXFULL2 at 0 range 2 .. 2;
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RXFULL3 at 0 range 3 .. 3;
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Reserved_4_7 at 0 range 4 .. 7;
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Reserved_4_7 at 0 range 4 .. 7;
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RXEMPTY at 0 range 8 .. 11;
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RXEMPTY0 at 0 range 8 .. 8;
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RXEMPTY1 at 0 range 9 .. 9;
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RXEMPTY2 at 0 range 10 .. 10;
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RXEMPTY3 at 0 range 11 .. 11;
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Reserved_12_15 at 0 range 12 .. 15;
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Reserved_12_15 at 0 range 12 .. 15;
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TXFULL at 0 range 16 .. 19;
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TXFULL0 at 0 range 16 .. 16;
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TXFULL1 at 0 range 17 .. 17;
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TXFULL2 at 0 range 18 .. 18;
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TXFULL3 at 0 range 19 .. 19;
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Reserved_20_23 at 0 range 20 .. 23;
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Reserved_20_23 at 0 range 20 .. 23;
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TXEMPTY at 0 range 24 .. 27;
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TXEMPTY0 at 0 range 24 .. 24;
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TXEMPTY1 at 0 range 25 .. 25;
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TXEMPTY2 at 0 range 26 .. 26;
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TXEMPTY3 at 0 range 27 .. 27;
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Reserved_28_31 at 0 range 28 .. 31;
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Reserved_28_31 at 0 range 28 .. 31;
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end record;
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end record;
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type FDEBUG_Type is
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record
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RXSTALL0 : Bit_1;
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RXSTALL1 : Bit_1;
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RXSTALL2 : Bit_1;
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RXSTALL3 : Bit_1;
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Reserved_4_7 : Bit_4;
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RXUNDER0 : Bit_1;
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RXUNDER1 : Bit_1;
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RXUNDER2 : Bit_1;
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RXUNDER3 : Bit_1;
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Reserved_12_15 : Bit_4;
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TXOVER0 : Bit_1;
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TXOVER1 : Bit_1;
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TXOVER2 : Bit_1;
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TXOVER3 : Bit_1;
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Reserved_20_23 : Bit_4;
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TXTSTALL0 : Bit_1;
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TXTSTALL1 : Bit_1;
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TXTSTALL2 : Bit_1;
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TXTSTALL3 : Bit_1;
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Reserved_28_31 : Bit_4;
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end record
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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Volatile, Full_Access_Only;
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for FDEBUG_Type use
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record
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RXSTALL0 at 0 range 0 .. 0;
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RXSTALL1 at 0 range 1 .. 1;
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RXSTALL2 at 0 range 2 .. 2;
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RXSTALL3 at 0 range 3 .. 3;
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Reserved_4_7 at 0 range 4 .. 7;
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RXUNDER0 at 0 range 8 .. 8;
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RXUNDER1 at 0 range 9 .. 9;
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RXUNDER2 at 0 range 10 .. 10;
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RXUNDER3 at 0 range 11 .. 11;
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Reserved_12_15 at 0 range 12 .. 15;
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TXOVER0 at 0 range 16 .. 16;
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TXOVER1 at 0 range 17 .. 17;
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TXOVER2 at 0 range 18 .. 18;
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TXOVER3 at 0 range 19 .. 19;
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Reserved_20_23 at 0 range 20 .. 23;
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TXTSTALL0 at 0 range 24 .. 24;
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TXTSTALL1 at 0 range 25 .. 25;
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TXTSTALL2 at 0 range 26 .. 26;
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TXTSTALL3 at 0 range 27 .. 27;
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Reserved_28_31 at 0 range 28 .. 31;
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end record;
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type FLEVEL_Type is
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record
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TX0 : Bit_4;
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RX0 : Bit_4;
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TX1 : Bit_4;
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RX1 : Bit_4;
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TX2 : Bit_4;
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RX2 : Bit_4;
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TX3 : Bit_4;
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RX3 : Bit_4;
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end record
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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Volatile, Full_Access_Only;
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for FLEVEL_Type use
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record
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TX0 at 0 range 0 .. 3;
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RX0 at 0 range 4 .. 7;
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TX1 at 0 range 8 .. 11;
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RX1 at 0 range 12 .. 15;
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TX2 at 0 range 16 .. 19;
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RX2 at 0 range 20 .. 23;
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TX3 at 0 range 24 .. 27;
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RX3 at 0 range 28 .. 31;
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end record;
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type IRQ_Type is
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record
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IRQ0 : Bit_1;
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IRQ1 : Bit_1;
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IRQ2 : Bit_1;
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IRQ3 : Bit_1;
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IRQ4 : Bit_1;
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IRQ5 : Bit_1;
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IRQ6 : Bit_1;
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IRQ7 : Bit_1;
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Reserved : Bit_24;
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end record
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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Volatile, Full_Access_Only;
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for IRQ_Type use
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record
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IRQ0 at 0 range 0 .. 0;
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IRQ1 at 0 range 1 .. 1;
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IRQ2 at 0 range 2 .. 2;
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IRQ3 at 0 range 3 .. 3;
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IRQ4 at 0 range 4 .. 4;
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IRQ5 at 0 range 5 .. 5;
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IRQ6 at 0 range 6 .. 6;
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IRQ7 at 0 range 7 .. 7;
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Reserved at 0 range 8 .. 31;
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end record;
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type DBG_CFGINFO_Type is
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record
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FIFO_Depth : Bit_6;
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Reserved_6_7 : Bit_2;
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SM_Count : Bit_4;
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Reserved_12_15 : Bit_4;
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IMEM_Size : Bit_6;
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Reserved_22_31 : Bit_10;
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end record
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with Object_Size => 32, Bit_Order => System.Low_Order_First,
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Volatile, Full_Access_Only;
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for DBG_CFGINFO_Type use
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record
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FIFO_Depth at 0 range 0 .. 5;
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Reserved_6_7 at 0 range 6 .. 7;
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SM_Count at 0 range 8 .. 11;
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Reserved_12_15 at 0 range 12 .. 15;
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IMEM_Size at 0 range 16 .. 21;
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Reserved_22_31 at 0 range 22 .. 31;
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end record;
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type INSTR_MEM_Type is
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record
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Mem : Bit_16;
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Reserved : Bit_16;
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end record
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with Volatile, Full_Access_Only;
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type Array_INSTR_MEM is array (Natural range <>) of INSTR_MEM_Type
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with Component_Size => 32;
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type PIO_Type is
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type PIO_Type is
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record
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record
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CTRL : CTRL_Type;
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CTRL : CTRL_Type;
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FSTAT : FSTAT_Type;
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FSTAT : FSTAT_Type;
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end record;
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FDEBUG : FDEBUG_Type;
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FLEVEL : FLEVEL_Type;
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type Direct_PIO_Type is
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TXF : Array_Bit_32 (0 .. 3);
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record
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RXF : Array_Bit_32 (0 .. 3);
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CTRL : Bit_32;
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IRQ : IRQ_Type;
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FSTAT : Bit_32;
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IRQ_Force : IRQ_Type;
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Input_Sync_Bypass : Array_Bit_1 (0 .. 31)
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with Volatile, Full_Access_Only;
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DBG_PADOUT : Array_Bit_1 (0 .. 31)
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with Volatile, Full_Access_Only;
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DBG_PADOE : Array_Bit_1 (0 .. 31)
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with Volatile, Full_Access_Only;
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DBG_CFGINFO : DBG_CFGINFO_Type;
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INSTR_MEM : Array_INSTR_MEM (0 .. 31);
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end record;
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end record;
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PIO_0 : PIO_Type
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PIO_0 : PIO_Type
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with Volatile, Address => PIO_0_Base;
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with Volatile, Address => PIO_0_Base;
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PIO_0_XOR : PIO_Type
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with Volatile, Address => PIO_0_Base + Storage_Offset (16#1000#);
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PIO_0_Set : PIO_Type
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with Volatile, Address => PIO_0_Base + Storage_Offset (16#2000#);
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PIO_0_Clear : PIO_Type
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with Volatile, Address => PIO_0_Base + Storage_Offset (16#3000#);
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Direct_PIO_0 : Direct_PIO_Type
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with Volatile, Address => PIO_0_Base;
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Direct_PIO_0_XOR : Direct_PIO_Type
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with Volatile, Address => PIO_0_Base + Storage_Offset (16#1000#);
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Direct_PIO_0_Set : Direct_PIO_Type
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with Volatile, Address => PIO_0_Base + Storage_Offset (16#2000#);
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Direct_PIO_0_Clear : Direct_PIO_Type
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with Volatile, Address => PIO_0_Base + Storage_Offset (16#3000#);
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PIO_1 : PIO_Type
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PIO_1 : PIO_Type
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with Volatile, Address => PIO_1_Base;
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with Volatile, Address => PIO_1_Base;
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PIO_1_XOR : PIO_Type
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with Volatile, Address => PIO_1_Base + Storage_Offset (16#1000#);
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PIO_1_Set : PIO_Type
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with Volatile, Address => PIO_1_Base + Storage_Offset (16#2000#);
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PIO_1_Clear : PIO_Type
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with Volatile, Address => PIO_1_Base + Storage_Offset (16#3000#);
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Direct_PIO_1 : Direct_PIO_Type
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with Volatile, Address => PIO_1_Base;
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Direct_PIO_1_XOR : Direct_PIO_Type
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with Volatile, Address => PIO_1_Base + Storage_Offset (16#1000#);
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Direct_PIO_1_Set : Direct_PIO_Type
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with Volatile, Address => PIO_1_Base + Storage_Offset (16#2000#);
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Direct_PIO_1_Clear : Direct_PIO_Type
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with Volatile, Address => PIO_1_Base + Storage_Offset (16#3000#);
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end Interfaces.RP2040.PIO;
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end Interfaces.RP2040.PIO;
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@ -9,15 +9,34 @@ package Interfaces
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with Size => 3;
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with Size => 3;
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type Bit_4 is mod 2**4
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type Bit_4 is mod 2**4
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with Size => 4;
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with Size => 4;
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type Bit_5 is mod 2**5
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with Size => 5;
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type Bit_6 is mod 2**6
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with Size => 6;
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type Bit_10 is mod 2**10
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with Size => 10;
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type Bit_16 is mod 2**16
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with Size => 16;
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type Bit_20 is mod 2**20
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type Bit_20 is mod 2**20
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with Size => 20;
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with Size => 20;
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type Bit_24 is mod 2**24
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with Size => 24;
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type Bit_31 is mod 2**31
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type Bit_31 is mod 2**31
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with Size => 31;
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with Size => 31;
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type Bit_32 is mod 2**32
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type Bit_32 is mod 2**32
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with Size => 32;
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with Size => 32;
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type Array_Bit_1 is array (Natural range <>) of Bit_1
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with Component_Size => 1;
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type Array_Bit_32 is array (Natural range <>) of Bit_32
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with Component_Size => 32;
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function Shift_Left (Value : Bit_32; Amount : Natural)
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function Shift_Left (Value : Bit_32; Amount : Natural)
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return Bit_32 with Import, Convention => Intrinsic;
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return Bit_32 with Import, Convention => Intrinsic;
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function Shift_Right (Value : Bit_32; Amount : Natural)
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function Shift_Right (Value : Bit_32; Amount : Natural)
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