Adds Additional registers and supporting types

This commit is contained in:
Folkert Kevelam 2025-07-02 21:02:02 +02:00
parent 36825506d6
commit cb771ba762
2 changed files with 239 additions and 66 deletions

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@ -1,12 +1,19 @@
with System.Storage_Elements; use System.Storage_Elements;
package Interfaces.RP2040.PIO is package Interfaces.RP2040.PIO is
type CTRL_Type is type CTRL_Type is
record record
SM_Enable : Bit_4; SM_Enable0 : Bit_1;
SM_Restart : Bit_4; SM_Enable1 : Bit_1;
CLKDIV_Restart : Bit_4; SM_Enable2 : Bit_1;
SM_Enable3 : Bit_1;
SM_Restart0 : Bit_1;
SM_Restart1 : Bit_1;
SM_Restart2 : Bit_1;
SM_Restart3 : Bit_1;
CLKDIV_Restart0 : Bit_1;
CLKDIV_Restart1 : Bit_1;
CLKDIV_Restart2 : Bit_1;
CLKDIV_Restart3 : Bit_1;
Reserved : Bit_20; Reserved : Bit_20;
end record end record
with Object_Size => 32, Bit_Order => System.Low_Order_First, with Object_Size => 32, Bit_Order => System.Low_Order_First,
@ -14,21 +21,42 @@ package Interfaces.RP2040.PIO is
for CTRL_Type use for CTRL_Type use
record record
SM_Enable at 0 range 0 .. 3; SM_Enable0 at 0 range 0 .. 0;
SM_Restart at 0 range 4 .. 7; SM_Enable1 at 0 range 1 .. 1;
CLKDIV_Restart at 0 range 8 .. 11; SM_Enable2 at 0 range 2 .. 2;
SM_Enable3 at 0 range 3 .. 3;
SM_Restart0 at 0 range 4 .. 4;
SM_Restart1 at 0 range 5 .. 5;
SM_Restart2 at 0 range 6 .. 6;
SM_Restart3 at 0 range 7 .. 7;
CLKDIV_Restart0 at 0 range 8 .. 8;
CLKDIV_Restart1 at 0 range 9 .. 9;
CLKDIV_Restart2 at 0 range 10 .. 10;
CLKDIV_Restart3 at 0 range 11 .. 11;
Reserved at 0 range 12 .. 31; Reserved at 0 range 12 .. 31;
end record; end record;
type FSTAT_Type is type FSTAT_Type is
record record
RXFULL : Bit_4; RXFULL0 : Bit_1;
RXFULL1 : Bit_1;
RXFULL2 : Bit_1;
RXFULL3 : Bit_1;
Reserved_4_7 : Bit_4; Reserved_4_7 : Bit_4;
RXEMPTY : Bit_4; RXEMPTY0 : Bit_1;
RXEMPTY1 : Bit_1;
RXEMPTY2 : Bit_1;
RXEMPTY3 : Bit_1;
Reserved_12_15 : Bit_4; Reserved_12_15 : Bit_4;
TXFULL : Bit_4; TXFULL0 : Bit_1;
TXFULL1 : Bit_1;
TXFULL2 : Bit_1;
TXFULL3 : Bit_1;
Reserved_20_23 : Bit_4; Reserved_20_23 : Bit_4;
TXEMPTY : Bit_4; TXEMPTY0 : Bit_1;
TXEMPTY1 : Bit_1;
TXEMPTY2 : Bit_1;
TXEMPTY3 : Bit_1;
Reserved_28_31 : Bit_4; Reserved_28_31 : Bit_4;
end record end record
with Object_Size => 32, Bit_Order => System.Low_Order_First, with Object_Size => 32, Bit_Order => System.Low_Order_First,
@ -36,62 +64,188 @@ package Interfaces.RP2040.PIO is
for FSTAT_Type use for FSTAT_Type use
record record
RXFULL at 0 range 0 .. 3; RXFULL0 at 0 range 0 .. 0;
RXFULL1 at 0 range 1 .. 1;
RXFULL2 at 0 range 2 .. 2;
RXFULL3 at 0 range 3 .. 3;
Reserved_4_7 at 0 range 4 .. 7; Reserved_4_7 at 0 range 4 .. 7;
RXEMPTY at 0 range 8 .. 11; RXEMPTY0 at 0 range 8 .. 8;
RXEMPTY1 at 0 range 9 .. 9;
RXEMPTY2 at 0 range 10 .. 10;
RXEMPTY3 at 0 range 11 .. 11;
Reserved_12_15 at 0 range 12 .. 15; Reserved_12_15 at 0 range 12 .. 15;
TXFULL at 0 range 16 .. 19; TXFULL0 at 0 range 16 .. 16;
TXFULL1 at 0 range 17 .. 17;
TXFULL2 at 0 range 18 .. 18;
TXFULL3 at 0 range 19 .. 19;
Reserved_20_23 at 0 range 20 .. 23; Reserved_20_23 at 0 range 20 .. 23;
TXEMPTY at 0 range 24 .. 27; TXEMPTY0 at 0 range 24 .. 24;
TXEMPTY1 at 0 range 25 .. 25;
TXEMPTY2 at 0 range 26 .. 26;
TXEMPTY3 at 0 range 27 .. 27;
Reserved_28_31 at 0 range 28 .. 31; Reserved_28_31 at 0 range 28 .. 31;
end record; end record;
type FDEBUG_Type is
record
RXSTALL0 : Bit_1;
RXSTALL1 : Bit_1;
RXSTALL2 : Bit_1;
RXSTALL3 : Bit_1;
Reserved_4_7 : Bit_4;
RXUNDER0 : Bit_1;
RXUNDER1 : Bit_1;
RXUNDER2 : Bit_1;
RXUNDER3 : Bit_1;
Reserved_12_15 : Bit_4;
TXOVER0 : Bit_1;
TXOVER1 : Bit_1;
TXOVER2 : Bit_1;
TXOVER3 : Bit_1;
Reserved_20_23 : Bit_4;
TXTSTALL0 : Bit_1;
TXTSTALL1 : Bit_1;
TXTSTALL2 : Bit_1;
TXTSTALL3 : Bit_1;
Reserved_28_31 : Bit_4;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for FDEBUG_Type use
record
RXSTALL0 at 0 range 0 .. 0;
RXSTALL1 at 0 range 1 .. 1;
RXSTALL2 at 0 range 2 .. 2;
RXSTALL3 at 0 range 3 .. 3;
Reserved_4_7 at 0 range 4 .. 7;
RXUNDER0 at 0 range 8 .. 8;
RXUNDER1 at 0 range 9 .. 9;
RXUNDER2 at 0 range 10 .. 10;
RXUNDER3 at 0 range 11 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
TXOVER0 at 0 range 16 .. 16;
TXOVER1 at 0 range 17 .. 17;
TXOVER2 at 0 range 18 .. 18;
TXOVER3 at 0 range 19 .. 19;
Reserved_20_23 at 0 range 20 .. 23;
TXTSTALL0 at 0 range 24 .. 24;
TXTSTALL1 at 0 range 25 .. 25;
TXTSTALL2 at 0 range 26 .. 26;
TXTSTALL3 at 0 range 27 .. 27;
Reserved_28_31 at 0 range 28 .. 31;
end record;
type FLEVEL_Type is
record
TX0 : Bit_4;
RX0 : Bit_4;
TX1 : Bit_4;
RX1 : Bit_4;
TX2 : Bit_4;
RX2 : Bit_4;
TX3 : Bit_4;
RX3 : Bit_4;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for FLEVEL_Type use
record
TX0 at 0 range 0 .. 3;
RX0 at 0 range 4 .. 7;
TX1 at 0 range 8 .. 11;
RX1 at 0 range 12 .. 15;
TX2 at 0 range 16 .. 19;
RX2 at 0 range 20 .. 23;
TX3 at 0 range 24 .. 27;
RX3 at 0 range 28 .. 31;
end record;
type IRQ_Type is
record
IRQ0 : Bit_1;
IRQ1 : Bit_1;
IRQ2 : Bit_1;
IRQ3 : Bit_1;
IRQ4 : Bit_1;
IRQ5 : Bit_1;
IRQ6 : Bit_1;
IRQ7 : Bit_1;
Reserved : Bit_24;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for IRQ_Type use
record
IRQ0 at 0 range 0 .. 0;
IRQ1 at 0 range 1 .. 1;
IRQ2 at 0 range 2 .. 2;
IRQ3 at 0 range 3 .. 3;
IRQ4 at 0 range 4 .. 4;
IRQ5 at 0 range 5 .. 5;
IRQ6 at 0 range 6 .. 6;
IRQ7 at 0 range 7 .. 7;
Reserved at 0 range 8 .. 31;
end record;
type DBG_CFGINFO_Type is
record
FIFO_Depth : Bit_6;
Reserved_6_7 : Bit_2;
SM_Count : Bit_4;
Reserved_12_15 : Bit_4;
IMEM_Size : Bit_6;
Reserved_22_31 : Bit_10;
end record
with Object_Size => 32, Bit_Order => System.Low_Order_First,
Volatile, Full_Access_Only;
for DBG_CFGINFO_Type use
record
FIFO_Depth at 0 range 0 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
SM_Count at 0 range 8 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
IMEM_Size at 0 range 16 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
type INSTR_MEM_Type is
record
Mem : Bit_16;
Reserved : Bit_16;
end record
with Volatile, Full_Access_Only;
type Array_INSTR_MEM is array (Natural range <>) of INSTR_MEM_Type
with Component_Size => 32;
type PIO_Type is type PIO_Type is
record record
CTRL : CTRL_Type; CTRL : CTRL_Type;
FSTAT : FSTAT_Type; FSTAT : FSTAT_Type;
end record; FDEBUG : FDEBUG_Type;
FLEVEL : FLEVEL_Type;
type Direct_PIO_Type is TXF : Array_Bit_32 (0 .. 3);
record RXF : Array_Bit_32 (0 .. 3);
CTRL : Bit_32; IRQ : IRQ_Type;
FSTAT : Bit_32; IRQ_Force : IRQ_Type;
Input_Sync_Bypass : Array_Bit_1 (0 .. 31)
with Volatile, Full_Access_Only;
DBG_PADOUT : Array_Bit_1 (0 .. 31)
with Volatile, Full_Access_Only;
DBG_PADOE : Array_Bit_1 (0 .. 31)
with Volatile, Full_Access_Only;
DBG_CFGINFO : DBG_CFGINFO_Type;
INSTR_MEM : Array_INSTR_MEM (0 .. 31);
end record; end record;
PIO_0 : PIO_Type PIO_0 : PIO_Type
with Volatile, Address => PIO_0_Base; with Volatile, Address => PIO_0_Base;
PIO_0_XOR : PIO_Type
with Volatile, Address => PIO_0_Base + Storage_Offset (16#1000#);
PIO_0_Set : PIO_Type
with Volatile, Address => PIO_0_Base + Storage_Offset (16#2000#);
PIO_0_Clear : PIO_Type
with Volatile, Address => PIO_0_Base + Storage_Offset (16#3000#);
Direct_PIO_0 : Direct_PIO_Type
with Volatile, Address => PIO_0_Base;
Direct_PIO_0_XOR : Direct_PIO_Type
with Volatile, Address => PIO_0_Base + Storage_Offset (16#1000#);
Direct_PIO_0_Set : Direct_PIO_Type
with Volatile, Address => PIO_0_Base + Storage_Offset (16#2000#);
Direct_PIO_0_Clear : Direct_PIO_Type
with Volatile, Address => PIO_0_Base + Storage_Offset (16#3000#);
PIO_1 : PIO_Type PIO_1 : PIO_Type
with Volatile, Address => PIO_1_Base; with Volatile, Address => PIO_1_Base;
PIO_1_XOR : PIO_Type
with Volatile, Address => PIO_1_Base + Storage_Offset (16#1000#);
PIO_1_Set : PIO_Type
with Volatile, Address => PIO_1_Base + Storage_Offset (16#2000#);
PIO_1_Clear : PIO_Type
with Volatile, Address => PIO_1_Base + Storage_Offset (16#3000#);
Direct_PIO_1 : Direct_PIO_Type
with Volatile, Address => PIO_1_Base;
Direct_PIO_1_XOR : Direct_PIO_Type
with Volatile, Address => PIO_1_Base + Storage_Offset (16#1000#);
Direct_PIO_1_Set : Direct_PIO_Type
with Volatile, Address => PIO_1_Base + Storage_Offset (16#2000#);
Direct_PIO_1_Clear : Direct_PIO_Type
with Volatile, Address => PIO_1_Base + Storage_Offset (16#3000#);
end Interfaces.RP2040.PIO; end Interfaces.RP2040.PIO;

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@ -9,15 +9,34 @@ package Interfaces
with Size => 3; with Size => 3;
type Bit_4 is mod 2**4 type Bit_4 is mod 2**4
with Size => 4; with Size => 4;
type Bit_5 is mod 2**5
with Size => 5;
type Bit_6 is mod 2**6
with Size => 6;
type Bit_10 is mod 2**10
with Size => 10;
type Bit_16 is mod 2**16
with Size => 16;
type Bit_20 is mod 2**20 type Bit_20 is mod 2**20
with Size => 20; with Size => 20;
type Bit_24 is mod 2**24
with Size => 24;
type Bit_31 is mod 2**31 type Bit_31 is mod 2**31
with Size => 31; with Size => 31;
type Bit_32 is mod 2**32 type Bit_32 is mod 2**32
with Size => 32; with Size => 32;
type Array_Bit_1 is array (Natural range <>) of Bit_1
with Component_Size => 1;
type Array_Bit_32 is array (Natural range <>) of Bit_32
with Component_Size => 32;
function Shift_Left (Value : Bit_32; Amount : Natural) function Shift_Left (Value : Bit_32; Amount : Natural)
return Bit_32 with Import, Convention => Intrinsic; return Bit_32 with Import, Convention => Intrinsic;
function Shift_Right (Value : Bit_32; Amount : Natural) function Shift_Right (Value : Bit_32; Amount : Natural)